IR3519
IC PIN ORDER AND DESCRIPTION
NAME
UGATE
BOOT
PWM
GND
LGATE
VDD
EN/UV
NUMBER
1
2
3
4
5
6
7
I/O LEVEL
VIN + VDD
VIN +VDD
Up to 5V
Reference IC
VDD
Typical 7V
3.3V
DESCRIPTION
High-side driver output and input to GATEL non-overlap comparator
Bootstrapped gate drive supply – connect a capacitor to PHASE
Logic input
Power return – connect to source of synchronous MOSFET
Lower gate drive for synchronous MOSFET
IC bias supply
Bias this pin to > 2V to enable and < 0.6V to disable the IC (both gate
outputs held low). If VDD is below the under voltage lockout
threshold this pin is internally pulled low and provides an input Power
Good indicator function. If the Power Good and Enable functions are
not required this pin can be connected to the VDD pin. Do not float
this pin as incorrect operation could occur.
PH
8
VIN
Return for high-side driver, reference for GATEL non-overlap
comparator, and input to the diode emulation comparator.
Page 5 of 10
www.irf.com
8/15/08
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